[nSLUG] no networking

Dop Ganger nslug at fop.ns.ca
Fri Jan 9 14:34:24 AST 2004


On Fri, 9 Jan 2004, Peter Cordes wrote:

> On Tue, Jan 06, 2004 at 04:42:49PM -0400, Dop Ganger wrote:
> > If you're running different apps instead of one I suspect you won't get
> > the performance due to cache issues.
>
>  I would guess that total amount of memory traffic/cache use would be more
> of a factor.  I guess running two copies of the same program would lead to
> memory accesses at the same offsets within pages, but don't the caches
> have enough associativity (L2 is 8-way associative, L1 Dcache is 4-way, see
> www.sandpile.org) that this isn't a big problem.

Yes; the app in question was (if I understand correctly, it was some
rather complex scientific app) was threaded, with all the threads working
on the same data. I daresay running two completely separate jobs wouldn't
have the same effect.

> > I think that's the situation. It's probably cheaper for Intel to have a
> > mask that has everything enabled and picks out parts that are "good" for
> > different apps, but any chip that doesn't cut the mustard as (say) a P4
> > with HT can be reused as a P4 without HT. I remember that's what they did
> > with 486 SX and DX, and it wouldn't surprise me if that were still the
> > case...
>
>  That seems a little unlikely: don't they have to make laptop chips on
> purpose, since they have different speed-efficiency tradeoffs?

Sorry, I digressed onto desktop chips a bit there without being too clear.
I suspect it's still the same case with the mobile chips, since it's less
work (in terms of product development, fab engineering, etc) to use the
same mask and just disable unnecessary parts. However, I'm no electrical
engineer (the best I can boast of is being able to solder without burning
myself), so I could be off base here.

Cheers... Dop.




More information about the nSLUG mailing list